The present invention relates to a semiconductor device in which a stack of semiconductor chips is mounted on a wiring board.
Recently, to downsize electronic units and improve the reliability thereof, a semiconductor device in which multiple semiconductor chips are included in one package has been in high demand. In view of this, to realize high performance and high packaging density, a semiconductor device (an LSI package) made by stacking a plurality of semiconductor chips on a wiring board has attracted more and more attention.
Hereinafter, a known semiconductor device will be described with reference to the drawing.
FIG. 6 shows a cross-sectional structure for a known semiconductor device with a stack of LSI chips. As shown in FIG. 6, first and second LSI chips 102 and 103 are secured to each other on a wiring board 101 so that the non-circuitry sides of these chips 102 and 103 face each other, i.e., so that the top of the chip 102 faces the bottom of the chip. 103.
The circuitry side of the first LSI chip 102 faces the principal surface of the wiring board 101 and is electrically connected to the wiring board 101 via raised electrodes 104. In other words, the first LSI chip 102 is flip-chip bonded to the wiring board 101. External electrodes 105 on the circuitry side of the second LSI chip 103 are electrically connected to the wiring board 102 via metal fine wires 106.
However, in the known semiconductor device, because of recent remarkable increase in number of pins in an LSI chip, the external electrodes 105 on the second LSI chip 103 are often located almost right over the raised electrodes 104 on the first LSI chip 102 as viewed vertically downward from over the principal surface of the wiring board 101. Thus, during a wire bonding process in which the external electrodes on the second LSI chip 103 are bonded to the wiring board 101, if a load is applied downward vertically to the principal surface of the wiring board 101 with a bonding jig, the raised electrodes 104 and surrounding portions thereof (which will be herein referred to as “flip-chip bonding terminals”) are mechanically damaged. As a result, the electrical connection between the first LSI chip 102 and wiring board 101 via the raised electrodes 104 deteriorates due to the mechanical damage or the bonding terminals might be crushed. That is to say, if the thicknesses of the LSI chips 102 and 103 are reduced to 300 μm or less to meet the demand of thinning a semiconductor device, it should be difficult for the thinner LSI chips 102 and 103 to internally attenuate the load applied thereto by the bonding jig.
In addition, even if a low-melting metal with a mechanical strength greater than that of a conductive adhesive or resin is used for the raised electrodes 104, the mechanical strength of the bonding terminals will not increase so much as compared to the bonding terminals made of the conductive adhesive or resin. This is because the size of the raised electrodes 104 is several tens μm at the most.
Further, the first and second LSI chips 102 and 103 are secured together so that their non-circuitry sides face each other. Thus, it is difficult to mount a stack of three or more LSI chips on one wiring board 101. Accordingly, it is not so easy for the know techniques to further improve the performance and further increase packaging density.